Description

The Ethernet FMC Max is an FPGA Mezzanine Card that adds 4x Gigabit Ethernet ports to your FPGA board. It features the Texas Instruments DP83867 Gigabit Ethernet PHY, SGMII interfaces and support for Time Sensitive Networking, IEEE 1588 Start of Frame Detection and Wake-on-LAN packet detection. For more detailed information on the Ethernet FMC Max, including datasheets, schematics and example designs, please visit the product website.

• 4x 10/100/1000Mbps Ethernet Ports
• 4x TI DP83867 Gigabit Ethernet PHYs with support for:
  • Support for Time Sensitive Networking
  • Support for IEEE 1588 Start of Frame Detection
  • Support for Wake-on-LAN packet detection
• HPC FMC compliant with VITA 57.1
• 125MHz Precision Clock Oscillator for the MAC
• SGMII PHY-to-MAC interfaces
• Reference designs for multiple FPGA and MPSoC development boards
• Straightforward tech support

Frequently asked questions

What FPGA I/O voltages (VADJ) are supported by Ethernet FMC Max?

The Ethernet FMC Max was designed with level translators to enable it to support any VADJ voltage in the range of 1.2VDC to 2.5VDC.

Is the Ethernet FMC Max compatible with my FPGA board?

In general terms, the FPGA development board needs to have gigabit transceivers to use the Ethernet FMC Max, and those transceivers must be connected to the DP0-3 pins of the FMC connector. It also needs to be able to supply a VADJ voltage between 1.2VDC to 2.5VDC. Please visit the product website for a list of compatible FPGA boards and detailed compatibility requirements.

Do I need any purchased IP to use the Ethernet FMC Max?

The typical application of the Ethernet FMC Max requires an IP for the MAC, such as the Xilinx Tri-mode Ethernet MAC (which is not free) or the OpenCores TEMAC (which is free). Some FPGAs have hard integrated TEMACs which generally don’t require a license to use. So the answer to this question depends on your FPGA and your choice of MAC.